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Education
Ph.D. 1982, Chemistry, University of Washington
B.S. 1977, Chemistry, Oregon State University
Research Interests
As a faculty member in electrical and computer engineering I have research activities in both areas. In the domain of electrical engineering I supervise projects in the design of application specific integrated circuits. Since 1991 our interest has been content addressable memory (CAM) ASCS. With an eye on applications in searching and sorting, we are designing circuits in the gray area between CAMs and simple processing elements. The projects, primarily in CMOS, require digital (mostly) and analog circuit design. I am also collaborating with Dr. Schaumann in the area of design automation of continuous-time filter using a technique known in the literature as transconductance-C. This work is also analog and digital circuit design with the emphasis shifted to analog design. In addition to CMOS, we hope to design filters in GaAs and bipolar technologies. The basic idea is to analyze a high-level behavioral description of the filters (e.g. transfer function) and construct an IC layout by selecting transconductance cells and capacitors that meet design specifications. CMOS designs have been fabricated through a grant from an NSF sponsored program that I have received. In the area of computer engineering I have research projects in distributed and parallel computing. In 1992, parallelization of scientific and engineering software is our focus. Current projects include the development of local area network parallelization paradigms and studying applications of this paradigm to circuit design and scientific problems in electronic and molecular structure.
I am a Portland State co-Investigator of a three-year National Science Foundation grant to the Oregon Joint Graduate Schools in Engineering Network for Research and Engineering Education (NERO) project to establish a supercomputing metacenter. The purpose of this NERO project is to provide software tools and other support to engineers and scientists in the Northwest that have applications or research projects that require supercomputing facilities.
Selected Publications
R. Turakhia, T. Shannon, R. Daasch, B. Benware, B. Madge, "Defect Screening Using Independent Component Analysis on IDDQ," IEEE VLSI Test Symposium, 2005.
X. Haiqiao, R. Schaumann, R. Daasch, P.K. Wong, B. Pejcinovic, "A radio-frequency CMOS active inductor and its application in designing high-Q filters," Proceedings International Symposium on Circuits and Systems, pp. 197-200, 2004.
C. Schuermyer, J. Ruffler, R. Daasch, R. Madge, "Minimum testing requirements to screen temperature dependent defects," Proceedings International Test Conference, pp. 300-308, 2004.
R. Madge, B. Benware, R. Turakhia, R. Daasch, C. Schuermyer, J. Ruffler, "In search of the optimum test set-adaptive test methods for maximum defect coverage and lowest test cost," Proceedings International Test Conference, pp. 203-212, 2004.
R. Daasch, M. Rehani, "Dude! where's my data? - cracking open the hermetically sealed tester," Proceedings International Test Conference, 2004, panel session, p. 1428, 2004.
E. Long, R. Daasch, R. Madge, B. Benware, "Detection of temperature sensitive defects using ZTC," IEEE VLSI Test Symposium, pp. 185-190, 2004.
C. Schuermyer, B. Benware, K. Cota, R. Madge, R. Daasch, L. Ning, "Screening VDSM Outliers using Nominal and Subthreshold Supply Voltage IDDQ," International Test Conference, pp. 565-573, 2003.
R. Madge, B. Benware, R. Daasch, "Obtaining High Defect Coverage for Frequency Dependent Defects on Complex ASICs," IEEE Design and Test of Computers, pp. 46-53, 2003.
