ECE Courses on the Westside

Classes are held at the Capital Center: 18640 NW Walker Road, Beaverton
Click here to register.
For non admitted students, please fill out a Quick Entry form to enroll in these classes.

Fall 2009	Winter 2010	Spring 2010
ECE 510 - RFIC Design	ECE 510 - Wireless Communication	ECE 510 - Low Power Wireless
ECE 510 - System Design with Programmable Logic	ECE 510 - Embedded Systems	ECE 510 - Embedded Systems
ECE 588/688 - Advanced Computer Architecture II	ECE 525 - Digital Circuit Design I	ECE 525 - Digital Circuit Design I

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Fall 2009

ECE 510 - RFIC Design
Taught by Richard Campbell, PSU
Monday/Wednesday 5:00-6:50 p.m.
Held at the Capital Center in Beaverton: 18640 NW Walker Road

The class is a hands-on exploration of Radio Frequency Integrated Circuit design, using actual devices and circuits fabricated in TriQuint's TQPED 130 nm pHEMT process. Student projects will include design, critical design review, fabrication, and measurement of actual GaAs devices and ICs. ECE 531 and ECE 532 are prerequisites.

Email Dr. Campbell: campbell@ece.pdx.edu
Dr. Cambell's web site

ECE 510 - System Design with Programmable Logic
Taught by Roy Kravitz
Thursdays 5:30-9:10 p.m.
Held at the Capital Center in Beaverton: 18640 NW Walker Road

Programmable logic devices such as field programmable gate arrays (FPGAs) are a major part of digital design. Advances in semiconductor technology have made it possible to implement a complex, high performance system on a single programmable chip. This course discusses tools and techniques for designing, verifying and implementing System-on-Chip (SoC) designs using programmable logic. The course has a both an academic and project orientation: Students take several projects from concept through synthesis and debug on an FPGA development board while exploring the techniques used to optimize the design to meet high speed timing requirements. Mentor Graphics and Xilinx design automation software tools are used. Students must be familiar with Verilog HDL or willing to adjust from VHDL. Knowledge of Assembly language programming would be helpful.

Email Mr. Kravitz: Roy.Kravitz@serveron.com

ECE 588/688 - Advanced Computer Architecture II
Taught by Alaa Alameldeen, Intel
Monday/Wednesdays 7:00-8:50 p.m.

Discussion of parallel computer architectures and their uses. Key topics include MIMD architectures; associative processing; shared-memory and message-passing architectures; dataflow and reduction architectures; special-purpose processors; design and analysis of interconnection networks; and an overview of parallel software issues. Students will complete the project started in ECE 587/687.
Prerequisite: ECE 587/687.

Email Dr. Alameldeen: alaa@ece.pdx.com
Dr. Alameldeen's web site

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More Westside classes will be added as soon as information becomes available.

awarded

Jeff Hoffman & Don Tornquist have been chosen for the 2009-2010 ECE Undergraduate Honors Program. The program enables undergraduates to go beyond their normal studies to work with faculty in the area of their choice: research, entrepreneurship or innovation.

Dr. Robert Daasch has won the Semiconductor Research Corporation 2009 Technical Excellence Award. It is the second highest research award in the SRC. The Technical Excellence Award was established as an incentive and recognition program for research of exceptional value to GRC members. Authorized by the Board of Directors in December 1991, the award is intended to complement the Inventor Recognition Award. The Technical Excellence Award is shared among key contributors for innovative technology that significantly enhances the productivity/
competitiveness of the semiconductor industry. To date 25 research efforts have received the award. The 2008 Technical Excellence Award was presented to a team of researchers from Portland State University led by Professor W. Robert Daasch, and supported by students Liwei Ning (PhD 2009), and Amit Nahar (MS 2006) for their research, "Burn-in Reduction: Improving Outlier Screening".